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2.2.2 CPU Memory Space
cpu存儲空間（以下叫地址空間）

XDATA memory space. The XDATA memory map is given in Figure 2-1.
Xdata地址空間，64KB
The SRAM is mapped into address range of 0x0000 through (SRAM_SIZE – 1).
sram被映射在地址空間的的0-SRAM_SIZE-1
The XREG area is mapped into the 1-KB address range (0x6000–0x63FF). These registers are additional
registers, effectively extending the SFR register space. Some peripheral registers and most of the radio
control and data registers are mapped in here.
XREG寄存器被映射在0x6000–0x63FF。XREG寄存器是額外的寄存器，是SFR的補充。主要用于射頻控制等。
The SFR registers are mapped into address range (0x7080–0x70FF).
SFR寄存器被映射在0x7080–0x70FF。
The flash information page (2 KB) is mapped into the address range (0x7800–0x7FFF). This is a read-only
area and contains various information about the device.
flash信息頁被映射在0x7080–0x70FF。只讀。
The upper 32 KB of the XDATA memory space (0x8000–0xFFFF) is a read-only flash code bank (XBANK)
and can be mapped to any of the available flash banks using the MEMCTR.XBANK[2:0] bits.
flash bank的任意一頁可以映射在0x8000–0xFFFF，這個區域是XBANK。
The mapping of flash memory, SRAM, and registers to XDATA allows the DMA controller and the CPU
access to all the physical memories in a single unified address space.
這種將SRAM,falsh和寄存器映射到XDATA的地址映射方式，可以使得DMA和CPU在一個統一的地址空間中，尋址所有物理內存。




CODE memory space. The CODE memory space is 64 KB and is divided into a common area
(0x0000–0x7FFF) and a bank area (0x8000–0xFFFF) as shown in Figure 2-2. The common area is
always mapped to the lower 32 KB of the physical flash memory (bank 0). The bank area can be mapped
to any of the available 32-KB flash banks (from 0 to 7). The number of available flash banks depends on
the flash size option. Use the flash-bank-select register, FMAP, to select the flash bank. On 32 KB
devices, no flash memory can be mapped into the bank area. Reads from this region return 0x00 on these

devices.

code地址空間，64KB
被劃分為一個通用區（啟動區）0x0000–0x7FFF和一個bank區域0x8000–0xFFFF。bank區域可以映射flash的的任意一個可用bank.
cpu啟動時從CODE地址空間的0地址處取指令。

To allow program execution from SRAM, it is possible to map the available SRAM into the lower range of
the bank area from 0x8000 through (0x8000+SRAM_SIZE–1). The rest of of the currently selected bank is
still mapped into the address range from (0x8000 + SRAM_SIZE) through 0xFFFF). Set the

MEMCTR.XMAP bit to enable this feature.
為了可以從SRAM中執行程序，可以將SRAM映射到CODE的bank區域0x8000+SRAM_SIZE–1。這樣在啟動區放置一條跳轉代碼，就可以直接跳轉到SRAM執行了。

DATA memory space.The 8-bit address range of DATA memory is mapped into the upper 256 bytes of
the SRAM, i.e., the address range from (SRAM_SIZE-256) through (SRAM_SIZE-1).
DATA地址空間，256B
位于SRAM的最上邊的256字節。比如寄存器R0-R7都要通過DATA地址空間訪問。

SFR memory space. The 128-entry hardware register area is accessed through this memory space. The
SFR registers are also accessible through the XDATA address space at the address range (0x7080 –
0x70FF). Some CPU-specific SFR registers reside inside the CPU core and can only be accessed using
the SFR memory space and not through the duplicate mapping into XDATA memory space. These
specific SFR registers are listed in SFR Registers .
128個硬件寄存器通過這塊內存訪問，部分SFR寄存器也可以通過XDATA地址空間0x7080 –0x70FF訪問，如下
P0 0x80 CPU Port 0. Readable from XDATA (0x7080).
P1 0x90 CPU Port 1. Readable from XDATA (0x7090).
P2 0xA0 CPU Port 2. Readable from XDATA (0x70A0).
一些cpu特定的寄存器位于cpu核內部，只能通過SFR地址空間訪問而不能通過XDATA地址空間訪問。大部分SFR都不能通過XDATA訪問。

綜上，4個地址空間
XDATA,幾乎所有的物理存儲器都可以映射到這個地址空間之上，包括sram,flash,xreg,information fage,少部分SFR。
CODE，falsh可以映射到其上，SRAM也可以。
DATA，只有SRAM的最高256字節可以映射其上。
SFR，大部分的SFR寄存器都使用SFR地址空間尋址。

注意：DATA地址空間和SRAM內存似乎有點混論，只要記住data地址空間就是用來訪問SRAM的最高256字節的。
2.2.3 Physical Memory
物理存儲器

RAM. All devices contain static RAM. At power on, the content of RAM is undefined. RAM content is
retained in all power modes.
SRAM可以映射到XDATA地址空間0起始地址，也可以映射到CODE地址空間的上半截。

Flash Memory. The on-chip flash memory is primarily intended to hold program code and constant data.
The flash memory has the following features:
· Page size: 2 KB
· Flash-page erase time: 20 ms
· Flash-chip (mass) erase time: 20 ms
· Flash write time (4 bytes): 20 ms
· Data retention (at room temperature): 100 years
· Program/erase endurance: 20,000 cycles
falsh可以映射到CODE地址空間和XDATA地址空間的XBANK
SFR Registers. The special function registers (SFRs) control several of the features of the 8051 CPU
core and/or peripherals. Many of the 8051 core SFRs are identical to the standard 8051 SFRs. However,
there are additional SFRs that control features that are not available in the standard 8051. The additional
SFRs are used to interface with the peripheral units and RF transceiver.
可以使用SFR地址空間訪問，部分寄存器也可以使用XDATA地址空間訪問。

The Information Page is a 2 KB read-only region that stores various device information. Among other
things it contains a unique IEEE address from the TI range of addresses. It is stored with the least
significant byte first at XDATA address 0x780C. A separate design note will be published that details the
contents of the information page.
SFR Registers. The special function registers (SFRs) control several of the features of the 8051 CPU
core and/or peripherals. Many of the 8051 core SFRs are identical to the standard 8051 SFRs. However,
there are additional SFRs that control features that are not available in the standard 8051. The additional
SFRs are used to interface with the peripheral units and RF transceiver.
保存了設備信息比如IEEE地址。
只能使用XDATA地址空間訪問。

XREG Registers. The XREG registers are additional registers in the XDATA memory space. These
registers are mainly used for radio configuration and control. A complete description of each register is
given in Section 3.6. Table 2-2 gives a descriptive overview of the register address space.
只能通過XDATA地址空間訪問

另外：
arm（9,11）執行指令時，是從ram中取代碼的。所以開機時需要先將程序代碼從nandflash搞到ram中去(如果是norflash，arm9,11也可以直接執行之）。
單片機執行指令時，是從flash中取代碼的。
一般在ram中運行很快，但是單片機的ram比較小，一般不足以放置一個較大的代碼，所以就直接從flash中運行了。


flash壽命-http://e2e.ti.com/support/low_power_rf/f/155/t/36547.aspx
For?CC2530?and?CC2531, the flash can handle 20,000 erase cycles.

cc2530讀flash
HalFlashRead
cc2530共計有256KBflash,每2KB劃分為1page,每16page劃分為1 bank
如圖


在讀取flash中數據的時候，首先要知道是讀的哪個第幾個bank中的數據，因為要把對應的flash bank映射到xdata地址空間的XBANK上，在xdata地址空間去讀。映射bank的時候需要配置寄存器MEMCTR為相應的bank號。
//所以如果是pg=63,offset=0,則要讀的xdata地址是0x8000+pg%16*2048+offset void HalFlashRead(uint8 pg, uint16 offset, uint8 *buf, uint16 cnt) {// Calculate the offset into the containing flash bank as it gets mapped into XDATA.uint8 *ptr = (uint8 *)(offset + HAL_FLASH_PAGE_MAP) +((pg % HAL_FLASH_PAGE_PER_BANK) * HAL_FLASH_PAGE_SIZE);uint8 memctr = MEMCTR; // Save to restore.#if !defined HAL_OAD_BOOT_CODEhalIntState_t is; #endifpg /= HAL_FLASH_PAGE_PER_BANK; // Calculate the flash bank from the flash page.#if !defined HAL_OAD_BOOT_CODEHAL_ENTER_CRITICAL_SECTION(is); #endif// Calculate and map the containing flash bank into XDATA.MEMCTR = (MEMCTR & 0xF8) | pg;while (cnt--){*buf++ = *ptr++;}MEMCTR = memctr;#if !defined HAL_OAD_BOOT_CODEHAL_EXIT_CRITICAL_SECTION(is); #endif }

協議棧NVITEM使用的flash位于的地址
#define OSAL_NV_PAGE_BEG ? ? ? ?HAL_NV_PAGE_BEG//=126-6+1=121

#define OSAL_NV_PAGE_END ? ? ? (OSAL_NV_PAGE_BEG + OSAL_NV_PAGES_USED - 1)//=121+6-1=126

即0x3C800---0x3F800-1
另外，
在f8w2530.xcl中有對flash邏輯地址作如下定義
// Texas Instruments device specific // ================================= // // // Layout of CODE banks // ------------------- // //-D_BANK0_START=0x08000 //-D_BANK0_END=0x0FFFF // //-D_BANK1_START=0x18000 //-D_BANK1_END=0x1FFFF // //-D_BANK2_START=0x28000 //-D_BANK2_END=0x2FFFF // //-D_BANK3_START=0x38000 //-D_BANK3_END=0x3FFFF // //-D_BANK4_START=0x48000 //-D_BANK4_END=0x4FFFF // //-D_BANK5_START=0x58000 //-D_BANK5_END=0x5FFFF // //-D_BANK6_START=0x68000 //-D_BANK6_END=0x6FFFF // //-D_BANK7_START=0x78000 //-D_BANK7_END=0x7FFFF
與falsh的實際物理地址如下對應


NVItem有如下定義
// Internal flash used for NV address space: reserving 6 pages.
//
-D_ZIGNV_ADDRESS_SPACE_START=(((_NR_OF_BANKS+1)*_FIRST_BANK_ADDR)-0x3800) ??
-D_ZIGNV_ADDRESS_SPACE_END=(_ZIGNV_ADDRESS_SPACE_START+0x2FFF)
-Z(CODE)ZIGNV_ADDRESS_SPACE=_ZIGNV_ADDRESS_SPACE_START-_ZIGNV_ADDRESS_SPACE_END
∴
D_ZIGNV_ADDRESS_SPACE_START=(7+1)*0x8000-0x3800 = 0x3C800


// IEEE address space (EUI-64) put at last 8 bytes of last page before the flash lock bits.
-D_IEEE_ADDRESS_SPACE_START=(((_NR_OF_BANKS+1)*_FIRST_BANK_ADDR)-0x18)
-D_IEEE_ADDRESS_SPACE_END=(_IEEE_ADDRESS_SPACE_START+7)
-Z(CODE)IEEE_ADDRESS_SPACE=_IEEE_ADDRESS_SPACE_START-_IEEE_ADDRESS_SPACE_END
∴
D_IEEE_ADDRESS_SPACE_START=(7+1)*0x8000-0x18 = 0x3FFE8
即位于整塊flash的最后8個字節-除去lock位


// ? ?CODE
//
-D_CODE_START=0x0000
-D_CODE_END=0x7FFF ? ? ? ? ? ? // Last address for ROOT bank. ? ?rootbank的莫地址
代碼區


// XDATA available to the program.
//
// Reserving address 0x0 for NULL.
-D_XDATA_START=0x0001
-D_XDATA_END=0x1EFF


refer to 飛比 ?Zstack中關于NV的幾個問題(一)

轉載于:https://www.cnblogs.com/-song/archive/2013/02/14/3331828.html

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